FPGA Security Intern — DFX Lab, NYUAD

May 2025 – Present

During my internship at DFX Lab, I worked on developing advanced logic-locking security techniques to protect FPGA intellectual property and hardware execution from reverse engineering attacks. My work involved both theoretical vulnerability analysis using SAT solvers, as well as practical synthesis of hardened FPGA bitstreams using Xilinx toolchains. The internship culminated in a detailed technical presentation.

Contributions

• Engineered logic-locking mechanisms for secure HDC execution on Xilinx FPGAs.
• Conducted SAT-based vulnerability analysis and synthesized hardened configurations.
• Documented full design tradeoffs and presented findings to senior faculty.

Media

Xilinx FPGA Board

FPGA Security Demo